Why are unnecessary atomic loads not optimized away?
Let's consider this trivial code:#include <atomic>std::atomic<int> a;void f(){ for(int k=0;k<100;++k) a.load(std::memory_order_relaxed);}MSVC, Clang and GCC all perform 100 loads of a,...
View ArticleHow to implement `BEGIN ATOMIC` in PostgreSQL
What's the equivalent of Sybase BEGIN ATOMIC in PostgreSQL?It should be something like:CREATE OR REPLACE FUNCTION my_func()RETURNS intAS $$ BEGIN BEGIN ATOMIC UPDATE stetment1; UPDATE stetment2; UPDATE...
View ArticleIs it safe to delete a shared state using std::atomic_flag as synchronization...
I have a shared state that is used by two threads concurrently. At some point, both threads are done using the shared state; it is of no use anymore and must be deleted.Question: is it...
View ArticleIs a function atomic in MySQL? [duplicate]
I created test table as shown below:CREATE TABLE test ( num int);Then, I inserted the row whose num is 2 as shown below:INSERT INTO test (num) VALUES (2);Then, I created my_func() function which...
View ArticleCan CPU load data from another CPU's cache using LOCK CMPXCHG instruction in...
Let's say we have CPU-X and CPU-Y which have their own L1d caches. First, on CPU-X we execute simple read operation on memory location M that is stored in DRAM: after that CPU-X loads value stored in M...
View ArticleDo I need to synchronize writes to memory mapped file from different threads...
Let suppose I have memory mapped file and write into it from different threads (writes never overlap and are independent from each other). I want to sync already written data with disk and execute...
View ArticleAre procedures atomic in MySQL?
As the title says, are procedures atomic in MySQL? i.e. would something likefor (..)<check_if_row_has_flag>for (..)<update_row>work atomically?Interestingly, I couldn't find much about this...
View ArticleAre PostgreSQL functions transactional?
Is a PostgreSQL function such as the following automatically transactional?CREATE OR REPLACE FUNCTION refresh_materialized_view(name) RETURNS integer AS$BODY$ DECLARE _table_name ALIAS FOR $1; _entry...
View ArticleIs there a platform without native pointer sized atomics but with other sized...
I am doing a refactoring of widely used open source library and want to make it as robust as possible.Currently, it uses atomic size_t variables if it is supported but I wonder if it can miss some...
View ArticleAre plpgsql functions atomic?
I'm wondering about the atomicity of a plpgsql function call, as well as nesting calls:So for example, I'd like to put two pieces of information into two different tables:CREATE OR REPLACE FUNCTION...
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Why misaligned access to locked memory read intermediate value on intel cpu?
I'm studying misaligned memory access now.According to intel document, Lock instruction use bus-lock to the memory across two cache-line. (I have a 'core i7' cpu.)9.1.2 Bus LockingIntel 64 and IA-32...
View Articleacquire/release memory order on different processors
Below is from cppreference describing the memory order. It looks like acquire/relase will do two things here:Prevent (some) reordering within a threadMake acquire load after release store (Enforce load...
View ArticleIs ftruncate() asynchronous?
I am attempting to write a class in C++ that provides a means of atomically appending to a file, even for the case of power failure mid write.First, I write my current file position (a 64 bit offset...
View ArticleHow to initialize a static std::atomic data member
I would like to generate identifiers for a class named order in a thread-safe manner. The code below does not compile. I know that the atomic types do not have copy constructors, and I assume that...
View ArticleIs there an equivalent to intptr_t and uintptr_t in CUDA
Since intptr_t and uintptr_t refer to integer types capable of holding a host pointer, is there some equivalent that can be used in device code?This would be particularly useful for device-side...
View ArticleWRITE_ONCE and READ_ONCE in linux kernel
Can somebody explain the usage of WRITE_ONCE and READ_ONCE?And internally WRITE_ONCE uses a volatile qualifier. Why?How does WRITE_ONCE and READ_ONCE solve cache coherency problem?Difference between...
View ArticleC# Interlocked Increment/Decrement on Native Int
C# 9.0 introduced native sized integers (see here). However, when trying to use these native integers with Interlocked.Increment() or Interlocked.Decrement() there aren't any overloads that allow...
View ArticleWhat are the various ways to disable and re-enable interrupts in STM32...
The standard technique to enforce atomic access to volatile variables shared with ISRs, via "atomic access guards" or "interrupt guards", in particular when running a bare metal, single-threaded...
View ArticleWhich variable types/sizes are atomic on STM32 microcontrollers?
Here are the data types on STM32 microcontrollers: http://www.keil.com/support/man/docs/armcc/armcc_chr1359125009502.htm.These microcontrollers use 32-bit ARM core processors.Which data types have...
View ArticleIs unaligned access in Cortex-M4 atomic?
In the ARM documentation, it mentions thatThe Cortex-M4 processor supports ARMv7 unaligned accesses, and performs all accesses as single, unaligned accesses. They are converted into two or more aligned...
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